LATIDIA · Investigación

Construcción automatizada fiel y completa asistida por LLM de gráficos jerárquicos de conocimiento de hardware

arXiv: 2610.12762v1Announce Type: new Resumen: Las hojas de datos de hardware contienen especificaciones de ingeniería esenciales para la selección de componentes, la integración del sistema y la verificación de compatibilidad de hardware. Sin embargo, inspe manual

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arXiv:2610.12762v1 Announce Type: new Abstract: Hardware datasheets contain engineering specifications essential for component selection, system integration, and hardware compatibility verification. However, manual inspection is tedious and error-prone because datasheets are lengthy and heterogeneous, with dense information fragmented across tables, figures, and text. Although large language models (LLMs) can automate this process, na\"ive one-shot processing omits relevant specifications even when the document fits within the model's context window. We present an automated LLM-driven pipeline that transforms hardware datasheets into general-purpose hierarchical hardware knowledge graphs through chunk-based property extraction, hierarchical routing, and iterative refinement. The framework uses LLMs for information extraction and semantic reasoning while preserving source provenance and applying graph updates